From 58d296e4fd1509ac2a6c4a977bda8149ad32c735 Mon Sep 17 00:00:00 2001 From: "arun.sharma@intel.com[adsharma]" Date: Thu, 24 Feb 2005 01:54:20 +0000 Subject: [PATCH] bitkeeper revision 1.1236.1.4 (421d33ccU_69hAlhQIokqDt-5pIheg) [PATCH] Disable VHPT for Region 6 - Disable VHPT for region 6. - Initialize the reserved bits in the region regs to 0. Otherwise it could result in a reserved register/field fault. Signed-off-by: Arun Sharma --- BitKeeper/etc/logging_ok | 1 + xen/arch/ia64/regionreg.c | 6 +++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/BitKeeper/etc/logging_ok b/BitKeeper/etc/logging_ok index 7d1ebe09cf..9b3a330841 100644 --- a/BitKeeper/etc/logging_ok +++ b/BitKeeper/etc/logging_ok @@ -6,6 +6,7 @@ akw27@arcadians.cl.cam.ac.uk akw27@boulderdash.cl.cam.ac.uk akw27@labyrinth.cl.cam.ac.uk akw27@plucky.localdomain +arun.sharma@intel.com bd240@boulderdash.cl.cam.ac.uk bd240@labyrinth.cl.cam.ac.uk br260@br260.wolfson.cam.ac.uk diff --git a/xen/arch/ia64/regionreg.c b/xen/arch/ia64/regionreg.c index 42c2908a53..9dee9a3cea 100644 --- a/xen/arch/ia64/regionreg.c +++ b/xen/arch/ia64/regionreg.c @@ -325,6 +325,7 @@ if (!ed->vcpu_info) { printf("Stopping in init_all_rr\n"); dummy(); } ed->vcpu_info->arch.rrs[3] = rrv.rrval; ed->vcpu_info->arch.rrs[4] = rrv.rrval; ed->vcpu_info->arch.rrs[5] = rrv.rrval; + rrv.ve = 0; ed->vcpu_info->arch.rrs[6] = rrv.rrval; // ed->shared_info->arch.rrs[7] = rrv.rrval; } @@ -367,10 +368,13 @@ unsigned long load_region_regs(struct exec_domain *ed) if (ed->vcpu_info->arch.metaphysical_mode) { ia64_rr rrv; + rrv.rrval = 0; rrv.rid = ed->domain->metaphysical_rid; rrv.ps = PAGE_SHIFT; rrv.ve = 1; - rr0 = rr1 = rr2 = rr3 = rr4 = rr5 = rr6 = newrr7 = rrv.rrval; + rr0 = rr1 = rr2 = rr3 = rr4 = rr5 = newrr7 = rrv.rrval; + rrv.ve = 0; + rr6 = rrv.rrval; } else { rr0 = physicalize_rid(ed, ed->vcpu_info->arch.rrs[0]); -- 2.30.2